An FPGA-based digital class-D amplifier with power supply error correction

Zeqi Yu, Yangyu Fan, Guoyun Lv

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents the design and implementation of a Field Programmable Gate Array (FPGA)-based two-channel digital class-D amplifier with H-bridge power stages. Because in H-bridge power stages the power supply noise can intermodulate with the input signals to cause errors in the outputs, a power supply noise measurement circuit and two correction blocks are employed in the proposed amplifier to correct the errors. An experimental measurement platform with a 55 V linear unregulated power supply was built to measure the proposed amplifier. The results obtained show that the errors caused by the power supply noise can be corrected in the proposed amplifier and the Total Harmonic Distortion + Noise (THD+N) of the proposed amplifier is 0.039% with 1 kHz, -1 dBFS input.

Original languageEnglish
Title of host publicationProceedings of the 2014 9th IEEE Conference on Industrial Electronics and Applications, ICIEA 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1356-1360
Number of pages5
ISBN (Electronic)9781479943166
DOIs
StatePublished - 20 Oct 2014
Event9th IEEE Conference on Industrial Electronics and Applications, ICIEA 2014 - Hangzhou, China
Duration: 9 Jun 201411 Jun 2014

Publication series

NameProceedings of the 2014 9th IEEE Conference on Industrial Electronics and Applications, ICIEA 2014

Conference

Conference9th IEEE Conference on Industrial Electronics and Applications, ICIEA 2014
Country/TerritoryChina
CityHangzhou
Period9/06/1411/06/14

Keywords

  • digital class-D amplifier
  • Field Programmable Gate Array (FPGA)
  • H-bridge
  • intermodulation
  • power supply noise

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