A Parallel Solver to the Three-Level VSC Modeling for HIL Application

Chen Liu, Rui Ma, Hao Bai, Franck Gechter, Fei Gao

科研成果: 书/报告/会议事项章节会议稿件同行评审

1 引用 (Scopus)

摘要

This paper presents enhanced parallel field-programmable gate array (FPGA) architecture for solving the model of diode-clamped three-level voltage source converter (VSC). The simulator is intended for the testing evaluation of digital control based on the hardware-in-the-loop (HIL) concept. The philosophies of the proposed implementation are: 1) it enables to the use of simulation as low as 40 nanoseconds, 2) it can provide a fixed timeline for the whole system execution; 3) it effectively utilize the parallel architecture in the FPGA. The implementation results in the National Instruments FIexRIO PXIe-7975 platform are compared with offline simulation in Matlab. The results show high accuracy of the modeling approach.

源语言英语
主期刊名2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018
出版商Institute of Electrical and Electronics Engineers Inc.
991-995
页数5
ISBN(印刷版)9781538630488
DOI
出版状态已出版 - 28 8月 2018
已对外发布
活动2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018 - Long Beach, 美国
期限: 13 6月 201815 6月 2018

出版系列

姓名2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018

会议

会议2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018
国家/地区美国
Long Beach
时期13/06/1815/06/18

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