A Parallel Solver to the Three-Level VSC Modeling for HIL Application

Chen Liu; Rui Ma; Hao Bai; Franck Gechter; Fei Gao

doi:10.1109/ITEC.2018.8450108

A Parallel Solver to the Three-Level VSC Modeling for HIL Application

Chen Liu, Rui Ma, Hao Bai, Franck Gechter, Fei Gao

University of Technology of Belfort-Montbéliard

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

This paper presents enhanced parallel field-programmable gate array (FPGA) architecture for solving the model of diode-clamped three-level voltage source converter (VSC). The simulator is intended for the testing evaluation of digital control based on the hardware-in-the-loop (HIL) concept. The philosophies of the proposed implementation are: 1) it enables to the use of simulation as low as 40 nanoseconds, 2) it can provide a fixed timeline for the whole system execution; 3) it effectively utilize the parallel architecture in the FPGA. The implementation results in the National Instruments FIexRIO PXIe-7975 platform are compared with offline simulation in Matlab. The results show high accuracy of the modeling approach.

Original language	English
Title of host publication	2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	991-995
Number of pages	5
ISBN (Print)	9781538630488
DOIs	https://doi.org/10.1109/ITEC.2018.8450108
State	Published - 28 Aug 2018
Externally published	Yes
Event	2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018 - Long Beach, United States Duration: 13 Jun 2018 → 15 Jun 2018

Publication series

Name	2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018

Conference

Conference	2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018
Country/Territory	United States
City	Long Beach
Period	13/06/18 → 15/06/18

Keywords

Diode-clamped three-Ievel voltage source Converter
FIexRIO
FPGA
HIL
Parallel Calculation

Access to Document

10.1109/ITEC.2018.8450108

Cite this

Liu, C., Ma, R., Bai, H., Gechter, F., & Gao, F. (2018). A Parallel Solver to the Three-Level VSC Modeling for HIL Application. In 2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018 (pp. 991-995). Article 8450108 (2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ITEC.2018.8450108

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title = "A Parallel Solver to the Three-Level VSC Modeling for HIL Application",

abstract = "This paper presents enhanced parallel field-programmable gate array (FPGA) architecture for solving the model of diode-clamped three-level voltage source converter (VSC). The simulator is intended for the testing evaluation of digital control based on the hardware-in-the-loop (HIL) concept. The philosophies of the proposed implementation are: 1) it enables to the use of simulation as low as 40 nanoseconds, 2) it can provide a fixed timeline for the whole system execution; 3) it effectively utilize the parallel architecture in the FPGA. The implementation results in the National Instruments FIexRIO PXIe-7975 platform are compared with offline simulation in Matlab. The results show high accuracy of the modeling approach.",

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author = "Chen Liu and Rui Ma and Hao Bai and Franck Gechter and Fei Gao",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018 ; Conference date: 13-06-2018 Through 15-06-2018",

year = "2018",

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doi = "10.1109/ITEC.2018.8450108",

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Liu, C, Ma, R , Bai, H, Gechter, F & Gao, F 2018, A Parallel Solver to the Three-Level VSC Modeling for HIL Application. in 2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018., 8450108, 2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018, Institute of Electrical and Electronics Engineers Inc., pp. 991-995, 2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018, Long Beach, United States, 13/06/18. https://doi.org/10.1109/ITEC.2018.8450108

A Parallel Solver to the Three-Level VSC Modeling for HIL Application. / Liu, Chen; Ma, Rui ; Bai, Hao et al.
2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 991-995 8450108 (2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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PY - 2018/8/28

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N2 - This paper presents enhanced parallel field-programmable gate array (FPGA) architecture for solving the model of diode-clamped three-level voltage source converter (VSC). The simulator is intended for the testing evaluation of digital control based on the hardware-in-the-loop (HIL) concept. The philosophies of the proposed implementation are: 1) it enables to the use of simulation as low as 40 nanoseconds, 2) it can provide a fixed timeline for the whole system execution; 3) it effectively utilize the parallel architecture in the FPGA. The implementation results in the National Instruments FIexRIO PXIe-7975 platform are compared with offline simulation in Matlab. The results show high accuracy of the modeling approach.

AB - This paper presents enhanced parallel field-programmable gate array (FPGA) architecture for solving the model of diode-clamped three-level voltage source converter (VSC). The simulator is intended for the testing evaluation of digital control based on the hardware-in-the-loop (HIL) concept. The philosophies of the proposed implementation are: 1) it enables to the use of simulation as low as 40 nanoseconds, 2) it can provide a fixed timeline for the whole system execution; 3) it effectively utilize the parallel architecture in the FPGA. The implementation results in the National Instruments FIexRIO PXIe-7975 platform are compared with offline simulation in Matlab. The results show high accuracy of the modeling approach.

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Liu C, Ma R , Bai H, Gechter F, Gao F. A Parallel Solver to the Three-Level VSC Modeling for HIL Application. In 2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 991-995. 8450108. (2018 IEEE Transportation and Electrification Conference and Expo, ITEC 2018). doi: 10.1109/ITEC.2018.8450108

A Parallel Solver to the Three-Level VSC Modeling for HIL Application

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Keywords

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