@inproceedings{46a07e9f636c4132b73ba4d2082e1334,
title = "FPGA based hardware in the loop test of railway traction system",
abstract = "Hardware in the loop (HIL) test provides a timesaving and safe environment for testing prototypes. However, the main difficulty for the real time simulation of power electronic system is the modeling method for the complex system. This paper proposes a modeling method for traction system in high speed train for transportation application. In this paper, it proposes hardware in the loop test setup for railway high-speed train with field-programmable gate array (FPGA) boards of dSPACE simulator. Besides, in order to meet the computing power requirement of the system modeling, a multi-processor system of dSPACE is achieved through Gigalink connection. The whole HIL system can be used to evaluate both the hardware and software performance of traction control unit (TCU). The real time simulation results under steady-state and transient conditions demonstrate modeling accuracy and provide detailed insight into the development of this vehicle.",
keywords = "FPGA, Hardware in the loop, High speed train, Traction system, dSPACE",
author = "Chen Liu and Rui Ma and Bai Hao and Huan Luo and Fei Gao and Franck Gechter",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 1st IEEE International Conference on Industrial Electronics for Sustainable Energy Systems, IESES 2018 ; Conference date: 30-01-2018 Through 02-02-2018",
year = "2018",
month = apr,
day = "25",
doi = "10.1109/IESES.2018.8349875",
language = "英语",
series = "Proceedings - 2018 IEEE International Conference on Industrial Electronics for Sustainable Energy Systems, IESES 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "206--211",
booktitle = "Proceedings - 2018 IEEE International Conference on Industrial Electronics for Sustainable Energy Systems, IESES 2018",
}
