High throughput parallel encoding and decoding architecture for polar codes

Polar codes can provably achieve the capacity of a symmetric binary discrete memoryless channel. However, the encoding and decoding of polar codes with the conventional serial algorithm will lead to poor throughput. In this paper, we propose an encoding and decoding architecture of polar codes in a parallel way, and take advantage of the parallelism of belief propagation (BP) of polar codes to reduce the decoding delay. We investigate the implementation on graphic processing unit (GPU) for binary erasure channel (BEC) and Gaussian channel. Experimental results show that the performance of the presented architecture for Gaussian channel outperforming the conventional scheme in the BEC channel. The proposed parallel architecture of polar encoder achieves 778.86Kbps throughput when code length N=1024, and parallel architecture of polar decoder achieves 407.68Kbps throughput at 10 iterations when code length N=4096. The encoding was verified with code length N =512, 1024, 2048, 4096, 8192, 16384 and achieved up to 100× improvement in execution time compared to serial CPU encoding.