TY - JOUR
T1 - Real-time simulation of power electronic systems based on predictive behavior
AU - Liu, Chen
AU - Bai, Hao
AU - Zhuo, Shengrong
AU - Zhang, Xinyue
AU - Ma, Rui
AU - Gao, Fei
N1 - Publisher Copyright:
© 1982-2012 IEEE.
PY - 2020/9
Y1 - 2020/9
N2 - The field-programmable gate array (FPGA) based hardware-in-the-loop (HiL) test, which minimizes the time-step of the real-time simulation below 500 ns, is an enabling technology for the development of the control unit of high-power electronic systems (HPE). In order to improve the time performance of FPGA-based HiL, this article proposes a novel parallel structure using the predictive behavior of the power electronic system. With this structure, we design an improved system-level solver applied to HPE. A piecewise insulated-gate bipolar transistor (IGBT) model is used to determine the state of the switch, offering a quasi-realistic model of the power converter. A parallel integration method is also implemented to solve the status of the circuit elements. Moreover, the proposed parallel structural can execute both the IGBT model and circuit element model at the same time, thus, reducing the simulation time-step significantly. The numerical accuracy of the solution, the architecture design, and the issue of the parallel computation are discussed in detail. An ac-dc-ac topology is presented as a case study. At last, a 25 ns time step in the National Instruments FlexRIO platform is achieved. Results comparison with the reference model is also identified and discussed.
AB - The field-programmable gate array (FPGA) based hardware-in-the-loop (HiL) test, which minimizes the time-step of the real-time simulation below 500 ns, is an enabling technology for the development of the control unit of high-power electronic systems (HPE). In order to improve the time performance of FPGA-based HiL, this article proposes a novel parallel structure using the predictive behavior of the power electronic system. With this structure, we design an improved system-level solver applied to HPE. A piecewise insulated-gate bipolar transistor (IGBT) model is used to determine the state of the switch, offering a quasi-realistic model of the power converter. A parallel integration method is also implemented to solve the status of the circuit elements. Moreover, the proposed parallel structural can execute both the IGBT model and circuit element model at the same time, thus, reducing the simulation time-step significantly. The numerical accuracy of the solution, the architecture design, and the issue of the parallel computation are discussed in detail. An ac-dc-ac topology is presented as a case study. At last, a 25 ns time step in the National Instruments FlexRIO platform is achieved. Results comparison with the reference model is also identified and discussed.
KW - Field-programmable gate array (fpga)
KW - Hardware-in-the-loop (hil)
KW - Parallel structure
KW - Power electronic system modeling
KW - Real-time simulation
UR - http://www.scopus.com/inward/record.url?scp=85085262323&partnerID=8YFLogxK
U2 - 10.1109/TIE.2019.2941135
DO - 10.1109/TIE.2019.2941135
M3 - 文章
AN - SCOPUS:85085262323
SN - 0278-0046
VL - 67
SP - 8044
EP - 8053
JO - IEEE Transactions on Industrial Electronics
JF - IEEE Transactions on Industrial Electronics
IS - 9
M1 - 8844298
ER -