Improvement of memory characteristics for an organic charge trapping memory by introduction of PS tunneling layer

Peng Zhang, Mingdong Yi, Liya Huang, Wei Shi, Jintao Zhu, Wei Huang

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7 引用 (Scopus)

摘要

An organic charge trapping memory was fabricated employing (3-aminopropyl) triethoxysilane (APTES) self-assembled monolayer (SAM) as the charge trapping layer, and pentacene as the active layer. In the initial trial, APTES SAM is directly in contact with the active layer, which shows inferior memory characteristics exhibiting as small memory window, low reading currents ratio in WRER test, and short retention time. By introducing a thin Polystyrene (PS) tunneling layer between APTES SAM and active layer, all aspects of memory characteristics have been ameliorated, including enlarged memory window, much increased reading currents ratio in WRER test, and much longer retention time. Interestingly, the programming efficiency is not affected by the introduction of the PS tunneling layer, showing a short programming time of less than 1 μs. However, with further increase of PS tunneling layer thickness, the reading current ratio in WRER test and the programming efficiency is slightly decreased. In addition, the retention time is also slightly shorter in terms of thicker PS tunneling layer. Nevertheless, the comprehensive improvement of the memory characteristics by introducing PS tunneling layer enables the potential applications of a nonvolatile memory device.

源语言英语
文章编号105967
期刊Organic Electronics
87
DOI
出版状态已出版 - 12月 2020

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