TY - JOUR
T1 - Identification of mechanical responses of interconnect structures based on Bayesian regularization under board-level drop impact
AU - Long, Xu
AU - Hu, Yuntao
N1 - Publisher Copyright:
© 2025 Elsevier Ltd
PY - 2025/7
Y1 - 2025/7
N2 - To address the challenge of directly measuring the mechanical response of critical interconnect structures in board-level packaging structures, which is complicated by the inherent complexity of electronic components, a load identification methodology is first proposed in this study. This methodology is established based on finite element (FE) analysis to accurately identify the critical failure points in the key interconnect structures of board-level packaging. Furthermore, an indirect measurement method based on Bayesian regularization is proposed for load identification to comprehensively capture the stress conditions of critical structural components in the board-level packaging structures subjected to drop impact. During the impact process, the solder joints at the corners beneath the edge areas experience the maximum stress and strain, making them more prone to failure. The normal stress in the Z-direction (S33) perpendicular to the printed circuit board (PCB), which is the maximum stress component, is the primary cause of damage to the interconnect structure. To address the ill-posed problem in load identification, such as the instability due to the inversion of ill-conditioned matrices and sensitivity to noise, an improved Bayesian method using augmented Tikhonov regularization is introduced. The proposed method incorporates a wavelet thresholding technique to solve the problem of poor load identification accuracy under high noise levels. It adaptively determines the optimal regularization parameters during the identification process and effectively removes the noise impact on load recognition. The established response identification methodology is capable of achieving relatively small relative error (RE) and high correlation coefficients when identifying the mechanical response of critical interconnections in board-level packaging structures. Furthermore, both the smoothness of the response curve and the accuracy of peak value identification are ensured. The effect of varying numbers of input points on the identification results is also considered. The results show that more input points provide more effective constraints, thereby improving recognition accuracy. Under dual-input conditions, the RE is controlled below 8 % at medium to low noise levels, and remains below 10 % at high noise levels, providing an effective approach for effective stress analysis during the drop impact process.
AB - To address the challenge of directly measuring the mechanical response of critical interconnect structures in board-level packaging structures, which is complicated by the inherent complexity of electronic components, a load identification methodology is first proposed in this study. This methodology is established based on finite element (FE) analysis to accurately identify the critical failure points in the key interconnect structures of board-level packaging. Furthermore, an indirect measurement method based on Bayesian regularization is proposed for load identification to comprehensively capture the stress conditions of critical structural components in the board-level packaging structures subjected to drop impact. During the impact process, the solder joints at the corners beneath the edge areas experience the maximum stress and strain, making them more prone to failure. The normal stress in the Z-direction (S33) perpendicular to the printed circuit board (PCB), which is the maximum stress component, is the primary cause of damage to the interconnect structure. To address the ill-posed problem in load identification, such as the instability due to the inversion of ill-conditioned matrices and sensitivity to noise, an improved Bayesian method using augmented Tikhonov regularization is introduced. The proposed method incorporates a wavelet thresholding technique to solve the problem of poor load identification accuracy under high noise levels. It adaptively determines the optimal regularization parameters during the identification process and effectively removes the noise impact on load recognition. The established response identification methodology is capable of achieving relatively small relative error (RE) and high correlation coefficients when identifying the mechanical response of critical interconnections in board-level packaging structures. Furthermore, both the smoothness of the response curve and the accuracy of peak value identification are ensured. The effect of varying numbers of input points on the identification results is also considered. The results show that more input points provide more effective constraints, thereby improving recognition accuracy. Under dual-input conditions, the RE is controlled below 8 % at medium to low noise levels, and remains below 10 % at high noise levels, providing an effective approach for effective stress analysis during the drop impact process.
KW - Bayesian regularization
KW - Board-level packaging structure
KW - High strain-rate constitutive model
KW - Load identification
KW - Wavelet thresholding method
UR - http://www.scopus.com/inward/record.url?scp=105003411726&partnerID=8YFLogxK
U2 - 10.1016/j.microrel.2025.115755
DO - 10.1016/j.microrel.2025.115755
M3 - 文章
AN - SCOPUS:105003411726
SN - 0026-2714
VL - 170
JO - Microelectronics Reliability
JF - Microelectronics Reliability
M1 - 115755
ER -