A Fixed-Length Transfer Delay Based Adaptive Frequency-Locked Loop for Single-Phase Systems

Zhiyong Dai, Zhen Zhang, Yongheng Yang, Frede Blaabjerg, Yigeng Huangfu, Juxiang Zhang

科研成果: 期刊稿件文章同行评审

31 引用 (Scopus)

摘要

This letter presents an adaptive frequency-locked loop (FLL) with fixed-length transfer delay units for single-phase systems. By analyzing the relationship between the grid voltage and its transfer delay signals, a linear regression model of the grid voltage is established. Accordingly, a transfer delay based adaptive FLL (TD-AFLL) is proposed. A mathematic proof indicates that the proposed TD-AFLL can reject both phase offset errors and double-frequency oscillatory errors. Thus, the grid voltage parameters can be estimated accurately, even when the frequency drifts away from its nominal value. Moreover, fast dynamics of the TD-AFLL are achieved due to the transfer delay structure. Experiments verify the effectiveness of the proposed method.

源语言英语
文章编号8468126
页(从-至)4000-4004
页数5
期刊IEEE Transactions on Power Electronics
34
5
DOI
出版状态已出版 - 5月 2019

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