在轨高效目标检测加速技术

To solve the problem that deep convolutional neural network object detection algorithms are difficult to deploy on board due to their large number of parameters, large computation, limitations of onboard computing resources, storage resources, and power consumption, an efficient on board object detection algorithm acceleration framework and implementation method are proposed. First of all, a computing engine that can be compatible with three convolutional operators is designed, which effectively improves resource utilization. Secondly, the object detection algorithm model is expanded from the two dimensions of channel and convolution kernel, which realizes the high parallelization and scalability of the accelerator. Finally, the accelerator was implemented on multiple FPGA platforms and its performance was evaluated. Experimental results show that the proposed FPGA based accelerator can achieve up to 1843.2 GFLOPs throughput, and the inference time is 0.22 ms. Compared with accelerators proposed in related literature, the accelerator proposed in this paper has great advantages in terms of performance, power consumption, energy efficiency ratio, and inference time. It is suitable for deployment in resource constrained environments and has good application prospects and values on satellites.