The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache

Alfred Ji Qianqian; Zhao Ping; Cheng Sen; Tan Jingjing; Wei Xu; Wei Yong

doi:10.1007/978-3-642-16515-3_39

The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache

Alfred Ji Qianqian, Zhao Ping, Cheng Sen, Tan Jingjing, Wei Xu, Wei Yong

School of Mathematics and Statistics

Northwestern Polytechnical University Xian

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper proposes a program of efficient dual-port SRAM data exchange without waiting with FIFO-based cache, which is targeted for timely, massive and interactive features of data transmission in MIMO systems, using FIFO as a dual-port SRAM external cache to achieve real-time data exchange between multiple systems or processors. The program can solve time conflict and data covering problem in the competitive state of data storage, reduce the transmission delay to wait for data exchange. This paper uses dual-port SRAM CY7C019 to do a simulation test for the program, which can realize effective addressing between memory and CPU in address mapping way. By the analyses to the system performance, the effectiveness and feasibility of this program is proved.

Original language	English
Title of host publication	Web Information Systems and Mining - International Conference, WISM 2010, Proceedings
Pages	312-319
Number of pages	8
Edition	M4D
DOIs	https://doi.org/10.1007/978-3-642-16515-3_39
State	Published - 2010
Event	2010 International Conference on Web Information Systems and Mining, WISM 2010 - Sanya, China Duration: 23 Oct 2010 → 24 Oct 2010

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Number	M4D
Volume	6318 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	2010 International Conference on Web Information Systems and Mining, WISM 2010
Country/Territory	China
City	Sanya
Period	23/10/10 → 24/10/10

Keywords

Address mapping
Data exchange
Dual-port SRAM
FIFO buffer

Access to Document

10.1007/978-3-642-16515-3_39

Cite this

Qianqian, A. J., Ping, Z., Sen, C., Jingjing, T., Xu, W., & Yong, W. (2010). The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache. In Web Information Systems and Mining - International Conference, WISM 2010, Proceedings (M4D ed., pp. 312-319). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6318 LNCS, No. M4D). https://doi.org/10.1007/978-3-642-16515-3_39

Qianqian, Alfred Ji ; Ping, Zhao ; Sen, Cheng et al. / The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache. Web Information Systems and Mining - International Conference, WISM 2010, Proceedings. M4D. ed. 2010. pp. 312-319 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); M4D).

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title = "The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache",

abstract = "This paper proposes a program of efficient dual-port SRAM data exchange without waiting with FIFO-based cache, which is targeted for timely, massive and interactive features of data transmission in MIMO systems, using FIFO as a dual-port SRAM external cache to achieve real-time data exchange between multiple systems or processors. The program can solve time conflict and data covering problem in the competitive state of data storage, reduce the transmission delay to wait for data exchange. This paper uses dual-port SRAM CY7C019 to do a simulation test for the program, which can realize effective addressing between memory and CPU in address mapping way. By the analyses to the system performance, the effectiveness and feasibility of this program is proved.",

keywords = "Address mapping, Data exchange, Dual-port SRAM, FIFO buffer",

author = "Qianqian, {Alfred Ji} and Zhao Ping and Cheng Sen and Tan Jingjing and Wei Xu and Wei Yong",

year = "2010",

doi = "10.1007/978-3-642-16515-3_39",

language = "英语",

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series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

number = "M4D",

pages = "312--319",

booktitle = "Web Information Systems and Mining - International Conference, WISM 2010, Proceedings",

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note = "2010 International Conference on Web Information Systems and Mining, WISM 2010 ; Conference date: 23-10-2010 Through 24-10-2010",

}

Qianqian, AJ, Ping, Z, Sen, C, Jingjing, T, Xu, W & Yong, W 2010, The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache. in Web Information Systems and Mining - International Conference, WISM 2010, Proceedings. M4D edn, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), no. M4D, vol. 6318 LNCS, pp. 312-319, 2010 International Conference on Web Information Systems and Mining, WISM 2010, Sanya, China, 23/10/10. https://doi.org/10.1007/978-3-642-16515-3_39

The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache. / Qianqian, Alfred Ji; Ping, Zhao; Sen, Cheng et al.
Web Information Systems and Mining - International Conference, WISM 2010, Proceedings. M4D. ed. 2010. p. 312-319 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6318 LNCS, No. M4D).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ping, Zhao

AU - Sen, Cheng

AU - Jingjing, Tan

AU - Xu, Wei

AU - Yong, Wei

PY - 2010

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N2 - This paper proposes a program of efficient dual-port SRAM data exchange without waiting with FIFO-based cache, which is targeted for timely, massive and interactive features of data transmission in MIMO systems, using FIFO as a dual-port SRAM external cache to achieve real-time data exchange between multiple systems or processors. The program can solve time conflict and data covering problem in the competitive state of data storage, reduce the transmission delay to wait for data exchange. This paper uses dual-port SRAM CY7C019 to do a simulation test for the program, which can realize effective addressing between memory and CPU in address mapping way. By the analyses to the system performance, the effectiveness and feasibility of this program is proved.

AB - This paper proposes a program of efficient dual-port SRAM data exchange without waiting with FIFO-based cache, which is targeted for timely, massive and interactive features of data transmission in MIMO systems, using FIFO as a dual-port SRAM external cache to achieve real-time data exchange between multiple systems or processors. The program can solve time conflict and data covering problem in the competitive state of data storage, reduce the transmission delay to wait for data exchange. This paper uses dual-port SRAM CY7C019 to do a simulation test for the program, which can realize effective addressing between memory and CPU in address mapping way. By the analyses to the system performance, the effectiveness and feasibility of this program is proved.

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KW - Data exchange

KW - Dual-port SRAM

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Qianqian AJ, Ping Z, Sen C, Jingjing T, Xu W, Yong W. The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache. In Web Information Systems and Mining - International Conference, WISM 2010, Proceedings. M4D ed. 2010. p. 312-319. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); M4D). doi: 10.1007/978-3-642-16515-3_39

The research of efficient dual-port SRAM data exchange without waiting with FIFO-based cache

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