Multi-list Design and FPGA Implementation Method of OLSR protocol

Hongyu Zhang, Bo Li, Zhongjiang Yan, Mao Yang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Ad Hoc network is a new networking technology that does not rely on preset communication facilities, and is one of the important components of the next generation wireless communication network system. The OLSR (Optimized Link State Routing) protocol is a classic proactive routing protocol in Ad Hoc networks. Most of the existing research is based on software, there has not been a case of using hardware to implement the OLSR protocol. The core of implementing OLSR protocol based on FPGA (Field Programmable Gate Array) is the design of memory management table. This paper proposes a multi-link list design and FPGA implementation method, which effectively avoids the conflicts that will arise when using memory management tables.

Original languageEnglish
Title of host publicationIoT as a Service - 6th EAI International Conference, IoTaaS 2020, Proceedings
EditorsBo Li, Changle Li, Mao Yang, Zhongjiang Yan, Jie Zheng
PublisherSpringer Science and Business Media Deutschland GmbH
Pages474-483
Number of pages10
ISBN (Print)9783030675134
DOIs
StatePublished - 2021
Event6th EAI International Conference on IoT as a Service, IoTaaS 2020 - Xi'an, China
Duration: 19 Nov 202020 Nov 2020

Publication series

NameLecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering, LNICST
Volume346
ISSN (Print)1867-8211
ISSN (Electronic)1867-822X

Conference

Conference6th EAI International Conference on IoT as a Service, IoTaaS 2020
Country/TerritoryChina
CityXi'an
Period19/11/2020/11/20

Keywords

  • Ad Hoc
  • FPGA
  • Memory management
  • OLSR

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