An on-chip debugging method based on bus access

Zhang Peng, Fan Xiaoya, Huang Xiaoping

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

Supporting the online debugging is one of the design goals of SoC. Usually the function unit and the debugging structure are tightly coupled, thus it is hard to reuse the debug structure in other systems. This paper presents an on-chip debug method for SoC bus architecture. The system reuses On Chip Bus(OCB) as the transmission path for debugging data and debugs the units in system in form of bus access through debug interface. To implement debugging of embedded processor, Debug Support Unit and Debug Handle Unit is designed. The method fits for mainstream SoCs. It includes various debug functions and few limitations of debug interface, which is also very efficient. SoC of AMBA architecture with debug architecture of this kind has been implemented, and the debug function has been verified. The experiment indicates that the design satisfies the demand of SoC debugging.

Original languageEnglish
Title of host publication2013 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2013
DOIs
StatePublished - 2013
Event2013 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2013 - Kunming, Yunnan, China
Duration: 5 Aug 20138 Aug 2013

Publication series

Name2013 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2013

Conference

Conference2013 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2013
Country/TerritoryChina
CityKunming, Yunnan
Period5/08/138/08/13

Keywords

  • On-chip bus
  • On-chip debug
  • SoC

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