Tin⁃Based Perovskite Phototransistors: Research Progress and Prospects (Invited)

Significance Sn-based metal halide perovskites are increasingly treated as practical optoelectronic semiconductors. They absorb light strongly, allow wide chemical and structural design, and remain compatible with low-temperature fabrication that can be scaled. Their value is amplified by the fact that p-type transport is readily accessible, which keeps complementary device schemes feasible and widens the design space for large-area active-matrix driving and backplane electronics. This advantage does not come free. The soft ionic lattice is reactive under processing and bias: Sn(II) oxidation, defect generation, and interface trap build-up evolve with time, shift the balance between radiative and nonradiative recombination, and set hard limits on optical output and long-term stability. A three-terminal field-effect transistor (FET) configuration gives these materials a more controllable operating frame. The gate defines the channel carrier density, suppresses dark current, and enables amplified readout of photoinduced modulation, so optical stimuli can be converted into electrically programmable outputs with tighter control than two-terminal elements. This is why tin-perovskite phototransistors are positioned for sensitive photodetection and imaging, and why they can also host functions that rely on a programmable internal state, including optical writing and synaptic-like responses for neuromorphic vision. The next step is not more isolated demonstrations. What matters is a reproducible link from microscopic photophysics—absorption, carrier lifetime, trapping, and recombination—to device figures of merit, including responsivity, detectivity, response speed, and operational stability, under processing conditions that remain compatible with manufacturing. Progress At the materials level, tin-perovskite phototransistors capitalize on the tunability of the ABX₃ framework and its low-dimensional derivatives. A-site/halide selection and dimensional confinement, particularly in Ruddlesden-Popper and Dion-Jacobson phases, are used to tune bandgap and dielectric screening and to bias the defect landscape toward more tolerable states; improved environmental robustness is often reported alongside these choices. Ion motion remains the central constraint. The same lattice softness used to justify “defect tolerance” also allows mobile ions and bias-driven drift, so ion-transport management belongs to first-order device design rather than post-measurement interpretation. Device architecture has been used as a controlled variable rather than a layout preference. Bottom gate top contact (BGTC), bottom gate bottom contact (BGBC), top gate bottom contact (TGBC), and top gate top contact (TGTC) structures are repeatedly adopted to separate contact injection, dielectric coupling, and channel morphology effects. Layered tin-perovskite FETs establish stable p-channel operation early, and they also make one point difficult to ignore: extracted mobility, subthreshold behavior, and hysteresis can be dominated by contact resistance and interfacial trap states. The field responds accordingly. Work-function alignment, contact interlayers, and dielectric functionalization are treated as required steps to lower injection barriers and suppress trap-assisted losses. In parallel, chemical/additive engineering targets the same bottlenecks from the materials side. Additives and dopants are selected to suppress Sn-vacancy formation, slow Sn²⁺→Sn⁴⁺ oxidation, steer crystallization kinetics, and restrain ion migration; the expected outcome is narrower hysteresis with improved on/off ratio and field-effect mobility. Hybrid 2D/3D channels represent a pragmatic compromise between transport and stability. Core-shell 2D/3D designs report mobility around ≈ 25.5 cm² V¹ s¹ with reduced hysteresis, and optimization of composition and dimensionality has pushed mobility toward ≈ 70 cm² V^-1 s^-1. Surface p-doping has reached mobility near 53.3 cm² V^-1 s^-1 by increasing carrier density and improving injection. In 3D tin perovskites, composition control can tighten hysteresis and improve stability in the same device; representative trihalide systems report Δ V ≈ 0.1 V, and on/off ratios up to 10⁴. Vacuum deposition is being tested for film uniformity and circuit-level integration, and this direction reflects the push toward manufacturable processing rather than peak single-device metrics. Applications make the platform constraints visible. In photodetection, layered tin-perovskite phototransistors are commonly interpreted through mixed photoconductive gain and photogating under low dark current; reported values include photosensitivity on the order of 8 × 10⁴ and responsivity approaching 1.4 × 10⁴ A W^-1 . Dielectric engineering, including ferroelectric gating, has raised detectivity to ≈ 1.74 × 10¹⁰ Jones (1 Jones = 1 cm Hz^1/2 W^-1 ), kept responsivity at practical levels (e.g., ≈ 14.57 A W^-1), and shortened response time to ≈ 50 ms, which supports imaging-oriented demonstrations. Optical memory in 2D tin perovskites uses trapping-assisted photogating to write a nonvolatile state; reported devices combine on/off ratios > 10⁷ with responsivity around 6.9 × 10⁵ A W^-1 and retention of at least 40 d. Additive-enabled designs report faster programming (≈ 0.001 s) and stable operation over ≈ 300 write/erase cycles. Optoelectronic synapses rely on type-II heterojunctions and dual gate/light modulation to achieve long-term potentiation (LTP)/long-term depression (LTD) and programmable plasticity, with ultra-low drain bias reported down to -1 mV and array-level implementations tied to high recognition accuracy. Circuit demonstrations push beyond single devices: complementary concepts have produced inverters and logic gates with voltage gain of 200 at V_DD= 20 V and NAND/NOR functions, which frames the scalability question in circuit terms rather than individual device characterizations. Conclusion and Prospect Tin-based perovskite phototransistors have evolved from proof-of-concept layered FETs to multifunctional optoelectronic units that integrate sensing, amplification, memory, and neuromorphic behavior. The central lesson is that performance emerges from coupled optimization across composition, dimensionality, crystallization control, interfaces/contacts, and the management of both electronic traps and mobile ions. Looking forward, several obstacles must be addressed for practical deployment: i) long-term chemical stability against Sn²⁺ oxidation under realistic operation (electric field, illumination, heat, and ambient atmosphere); ii) suppression and controllability of ion migration to reconcile low hysteresis with desirable photogating gain; iii) low-voltage, low-power operation through dielectric innovation and contact engineering without sacrificing uniformity; and iv) scalable manufacturing and reproducibility for large-area arrays and circuit integration. Future research is expected to focus on spacer cation or additive design guided by coordination chemistry, stable 2D/3D and vertical heterostructures that decouple transport from stability, in situ/operando characterization to establish structure-ion-transport correlations, and co-integration with mature oxide or organic semiconductors to realize reliable sensor-memory-compute blocks. With these advances, tin-based perovskite phototransistors could become a practical platform for low-cost, large-area optoelectronic systems that merge perception, storage, and computing within compact hardware.