摘要
To integrate DC distributed generation (DG) with micro-source into the existing AC grid, a DC distribution bus can be used to couple on-site photovoltaics (PV), battery energy storage systems (BESS), and DC loads. If the converters connected to the DC bus are interleaved, the DC bus capacitor size could be minimized. In this paper, we propose an interleaving algorithm for multi-converter systems to minimize the current harmonics at switching frequency on the DC bus. The proposed algorithm is implemented using Resilient Information Architecture Platform for Smart Grid (RIAPS) platform. Hardware-in-the-Loop (HIL) simulation results based on Opal- RT are presented to validate its performance. The influence of synchronization frequency on the proposed algorithm are also considered.
| 源语言 | 英语 |
|---|---|
| 主期刊名 | 2018 9th IEEE International Symposium on Power Electronics for Distributed Generation Systems, PEDG 2018 |
| 出版商 | Institute of Electrical and Electronics Engineers Inc. |
| ISBN(印刷版) | 9781538667057 |
| DOI | |
| 出版状态 | 已出版 - 27 8月 2018 |
| 已对外发布 | 是 |
| 活动 | 9th IEEE International Symposium on Power Electronics for Distributed Generation Systems, PEDG 2018 - Charlotte, 美国 期限: 25 6月 2018 → 28 6月 2018 |
出版系列
| 姓名 | 2018 9th IEEE International Symposium on Power Electronics for Distributed Generation Systems, PEDG 2018 |
|---|
会议
| 会议 | 9th IEEE International Symposium on Power Electronics for Distributed Generation Systems, PEDG 2018 |
|---|---|
| 国家/地区 | 美国 |
| 市 | Charlotte |
| 时期 | 25/06/18 → 28/06/18 |
联合国可持续发展目标
此成果有助于实现下列可持续发展目标:
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可持续发展目标 7 经济适用的清洁能源
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