A novel CMOS active polyphase filter with wideband and low-power for GNSS receiver

In this letter, a novel circuit architecture for active polyphase filter is proposed and analyzed. The currents produced from two sourcefollower with capacitor and common-source stage in a single-stage are used to realize high-pass and low-pass functions, respectively. Compared to other conventional active polyphase filters, the proposed polyphase filter uses a simpler structure to achieve strong image rejection in a wide band while obtaining lower power consumption, higher operating frequency and smaller chip area. In the 0.18-μm CMOS process, the proposed active polyphase filter occupies less than 0.65mm² of chip area. From the measurements, the active polyphase filter shows an image rejection ratio of 48.5 dB at frequencies of 5.5MHz to 26.5 MHz, a voltage gain of 6.8 dB and an IIP3 of 3.8dBm at 16MHz while consuming only 3.1mA from a 1.8-V supply.