The Effect of Clock Jitter on Azimuth of DVOR and the Compensation Method

Zerong Ren, Wei Cheng, Yong Li, Xiang Gao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

IF digitization of the DVOR receiving system requires a high precision clock. In the DVOR receiving system, there will be a clock jitter with Gaussian white noise at a high carrier frequency, and the jitter will reduce the demodulation performance. In this paper, we propose a scheme for demodulating azimuth in DVOR receiving systems, and then the influence on the accuracy of bearing information is studied by using the clock jitter model commonly used in the literature. Additionally, DVOR signal clock compensation is proposed, to reduce sampling and signal processing effects caused by clock jitter. This compensation method could significantly improve the accuracy of bearing information in the receiving system.

Original languageEnglish
Title of host publication2022 IEEE 22nd International Conference on Communication Technology, ICCT 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages281-285
Number of pages5
ISBN (Electronic)9781665470674
DOIs
StatePublished - 2022
Event22nd IEEE International Conference on Communication Technology, ICCT 2022 - Virtual, Online, China
Duration: 11 Nov 202214 Nov 2022

Publication series

NameInternational Conference on Communication Technology Proceedings, ICCT
Volume2022-November-November

Conference

Conference22nd IEEE International Conference on Communication Technology, ICCT 2022
Country/TerritoryChina
CityVirtual, Online
Period11/11/2214/11/22

Keywords

  • azimuth error
  • clock compensation
  • clock jitter
  • DVOR receiving system

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