Study on microfluidic heat dissipation enhancement and thermal stress analysis in three-dimensional integrated circuit with through silicon via structures

High heat flux density and localized thermal stress have long been critical factors affecting the performance of three-dimensional integrated circuits (3D ICs). Here, a fluid–solid coupled model with embedded through-silicon via (TSV) structures is developed for the design of enhanced microfluidic cooling. The thermal performance of various TSV array configurations, microchannel cross-sections, flow path topologies, and inlet designs is analyzed through computational fluid dynamics (CFD) simulations. The results demonstrate that a variable-density microchannel layout with wave-shaped and cavity-type structures achieves a temperature reduction of approximately 15 K while maintaining a pressure drop below 20,000 Pa. Further optimization of cavity-type microchannels via response surface methodology (RSM) and a multi-objective genetic algorithm (MGA) yields a performance enhancement coefficient (PEC) of 1.12. Additionally, the study investigates the thermal stress distribution within the embedded TSV microfluidic cooling structure, identifying heat source power and TSV current density as the primary factors contributing to stress concentration. Furthermore, it verifies that increasing the TSV array spacing and positioning TSVs away from heat-generating chips can effectively mitigate this issue. The developed numerical model offers quantitative benchmarks for optimizing microfluidic cooling in 3D ICs, providing a foundation for mitigating thermal challenges and enhancing overall system reliability.