Method of 256-resolution resistor array performance testing and non-linearity correction

The MOS resistor array with 256 × 256 pixels is a core device for the hardware-in-the-loop simulation of an infrared imaging guidance system; the performance of its chip has a direct effect on the simulation performance and experimental results. But the MOS resistor array's performance testing and nonlinearity correction have always been the bottleneck problems and cutting-edge technologies for infrared imaging simulation. Hence the existing performance index testing methods were analyzed and based on the tests and experiments, the mapping registration and faulty pixel compensation algorithm was proposed. Then the non-linearity correction model was designed based on the exponential curve and the correction compensation was accomplished, tested and analyzed. The test results show that the non-linearity correction algorithm is workable; the linear control characteristics of the MOS resistor array corrected by the proposed algorithm are desirable; the gray scale of the infrared image of the resistor array is greatly enhanced, meeting the requirements for infrared imaging guidance simulation.