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A method for assessing soft error rate based on the resource configuration of netlist-level circuit topology in SRAM-based FPGAS

  • Guochang Zhou
  • , Xiang Gao
  • , Xiaoling Lai
  • , Qi Zhu
  • , Yangming Guo
  • China Aerospace Science and Technology Corporation

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

For the effect of signal propagation in the programmable logic device caused by single event effects (SEE) of the space environment, a method for assessing soft error rate based on the resource configuration of netlist-level circuit topology by SEE is proposed in this paper. This method makes use of the mapping relationship between the synthesized netlist and the device resource. Then the construction of signal logical propagation topology is closer to the physical layer through the algorithm of depth first search and the matching rules of control bits. Therefore, the propagation model for assessing soft-error propagation probability among the outputs in system is built based on the logic circuit signal propagation relationship, which is able to enhance the calculation accuracy of soft error rate. Ultimately, an engineering example is verified that this method could be able to effective and better evaluate design effect of mitigating SEE in circuit system.

Original languageEnglish
Title of host publicationProceedings of 2016 Prognostics and System Health Management Conference, PHM-Chengdu 2016
EditorsQiang Miao, Zhaojun Li, Ming J. Zuo, Liudong Xing, Zhigang Tian
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509027781
DOIs
StatePublished - 16 Jan 2017
Event7th IEEE Prognostics and System Health Management Conference, PHM-Chengdu 2016 - Chengdu, Sichuan, China
Duration: 19 Oct 201621 Oct 2016

Publication series

NameProceedings of 2016 Prognostics and System Health Management Conference, PHM-Chengdu 2016

Conference

Conference7th IEEE Prognostics and System Health Management Conference, PHM-Chengdu 2016
Country/TerritoryChina
CityChengdu, Sichuan
Period19/10/1621/10/16

Keywords

  • Circuit nodes
  • Forward circuit
  • Soft error rate
  • SRAM-based FPGA
  • XDL netlist

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